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 E-Series

Index-Click to Go Specific Section

1.Simulator

2.New_Addition-Video-Series-IITD Content

3.Differential Amplifier Design Series

4.CAD of Electronics

5.References-Ebook/websites

6.Digital VLSI Design Virtual lab


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Simulator

Number                                   Name of the E-resource  Download
1Online Circuit Simulator->
2Online Ng spice Simulator->
3Online net- Spice Simulator->
4Easy-EDA Simulator->
5 TCaD Software for Device simulation->
6Icarus iverilog Simulator->
7 Two-level (PLA) logic minimizer ->
8

LTspice, LTpowerCAD, LTpowerPlay, Linduino, LinearLab Tools

Timing Simulation & Design, High Speed DAC Eval Systems

PScope & QuikEval Evaluation Systems, Temperature Monitoring

Dust Networks Starter Kits, Dust Networks Programmer

->
9
  • Magic, the VLSI layout editor, extraction, and DRC tool.
  • XCircuit, the circuit drawing and schematic capture tool.
  • IRSIM, the switch-level digital circuit simulator.
  • Netgen, the circuit netlist comparison (LVS) and netlist conversion tool.
  • Qrouter, the over-the-cell (sea-of-gates) detail router.
  • Qflow, a complete digital synthesis design flow using open-source software and open-source standard cell libraries.
  • PCB, the printed circuit board layout editor.
->
10Scilab->

New_Addition-Video-Series-IITD Content

Number                                   Name of the E-resource  Download
1Introduction to Cadence->
2Cadence design framework->
3Design with Virtuoso schematic editor->
4Layouts->
5Virtuoso environment->
6Installation of SUSE on virtual machine->
7Installation and use of Ngspice and xcircuit ->
8Schematic capture using xcircuit (1/2)->
9Schematic capture using xcircuit (2/2)->
10Circuit simulation and SPICE->
11Ngspice demo ->
12NGSPICE and TinyCAD on Windows->
13NGSPICE - DC Simulation->
14NGSPICE - AC Simulation->
15Corner & Montecarlo Analysis->

Differential Amplifier Design Series

Number                                   Name of the E-resource  Download
1Single Stage Differential Aplifier Design(1/2)->
2Single Stage Differential Aplifier Design->

CAD of Electronics Lab

Number                                      Experiments   ManualActual Date
Experiment 1Transient Analysis of BJT inverter using step input & DC Analysis (VTC) of BJT inverter with & without parameters.Spice folder

LT-Spice Basics

02-Feb-2016
Experiment 2Transient Analysis of NMOS inverter using ramp input and pulse input & DC Analysis (VTC) of NMOS inverter with and without parameters & Scilab/Matlab Integration.Model File + AD, AS, PD, PS Calculation

LT-Spice folder

LT-Spice Parametric Reference

9-Feb-2016
Experiment 3Transient and DC analysis of CMOS inverter using Ramp and Pulse inputCMOS-Theory9-Feb-2016
Experiment 4Transient & DC Analysis of NOR Gate inverter.Logic Gate-Theory9-Feb-2016
Experiment 5Transient & DC Analysis of NAND Gate.Logic Gate-Theory9-Feb-2016
Experiment 6Synthesis and simulation of Full Adder & Full Subtractor.Click here19-04-2016
Experiment 7Synthesis and Simulation of 3 X 8 Decoder.

Click here19-04-2016
Experiment 8 Synthesis and Simulation of 8 X 1 Multiplexer.Click here19-04-2016
Experiment 9Synthesis and Simulation of 9 bit odd parity generator.Click here19-04-2016
Experiment 10Synthesis and Simulation of Flip Flop (D, and T).Click here19-04-2016

References for Assignments

Sno.Items Downloads
1LT-Spice ManualClick
2180nm Model FileClick
3Xilinx StartupClick
4Cad Lab Report SubmissionClick

References

Authors TitlePublisher Year
1Sung-Mo Kang & Yosuf Leblebici

CMOS Digital Integrated Circuits: Analysis & Design

TMH, 2nd Edition198_
2Analog Mixed Signal IC Design Lab CMOS Analog IC Design: Handouts and References Department of Electrical and Computer Engineering Boise State University 1987
3Weste-Nhe & Harris-D CMOS Vlsi Design " A circuit & System Perspective3rd Ed Pearson2005
4Weste-Nhe & Harris-D Solution of CMOS Vlsi Design " A circuit & System Perspective4th Ed Pearson2010
5W.Wolf Modern VLSI Design: System on ChipThird Edition, Pearson2002
6P. Gray, R. Meyer Analysis and Design of Analog Integrated CircuitsWiley2001
7CSIT Laboratory VerilogWebsiteAll

Other references

Authors TitlePublisher Year
1Update soonTime domain solution of LTI state equationsCourse handout,Massachussets Institute of Technology(MIT)2002
2James K RobergeOperation amplifiers :Theory & PracticeJohn Wiley1975
3FairchildMosfet Basics fairchildJohn Wiley1975

Digital VLSI Design Virtual lab

Number                                         Experiments
login Id:-eceiv2015/eceiv2015@googlegroups.com
Password:- ece7201
  Manual
To plot the (i) output characteristics & (ii) transfer characteristics of an n-channel and p-channel MOSFET.->
To design and plot the static (VTC) and dynamic characteristics of a digital CMOS inverter.->
To design and plot the output characteristics of a 3-inverter ring oscillator.->
To design and plot the dynamic characteristics of 2-input NAND, NOR, XOR and XNOR logic gates using CMOS technology.->
To design and plot the characteristics of a 4x1 digital multiplexer using pass transistor logic.->
To design and plot the characteristics of a positive and negative latch based on multiplexers.->
To design and plot the characteristics of a master-slave positive and negative edge triggered registers based on multiplexers. ->
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