| Experiment 1 | Transient Analysis of BJT inverter using step input & DC Analysis (VTC) of BJT inverter with & without parameters. | Spice folder LT-Spice Basics | 02-Feb-2016 |
| Experiment 2 | Transient Analysis of NMOS inverter using ramp input and pulse input & DC Analysis (VTC) of NMOS inverter with and without parameters & Scilab/Matlab Integration. | Model File + AD, AS, PD, PS Calculation LT-Spice folder LT-Spice Parametric Reference | 9-Feb-2016 |
| Experiment 3 | Transient and DC analysis of CMOS inverter using Ramp and Pulse input | CMOS-Theory | 9-Feb-2016 |
| Experiment 4 | Transient & DC Analysis of NOR Gate inverter. | Logic Gate-Theory | 9-Feb-2016 |
| Experiment 5 | Transient & DC Analysis of NAND Gate. | Logic Gate-Theory | 9-Feb-2016 |
| Experiment 6 | Synthesis and simulation of Full Adder & Full Subtractor. | Click here | 19-04-2016 |
| Experiment 7 | Synthesis and Simulation of 3 X 8 Decoder. | Click here | 19-04-2016 |
| Experiment 8 | Synthesis and Simulation of 8 X 1 Multiplexer. | Click here | 19-04-2016 |
| Experiment 9 | Synthesis and Simulation of 9 bit odd parity generator. | Click here | 19-04-2016 |
| Experiment 10 | Synthesis and Simulation of Flip Flop (D, and T). | Click here | 19-04-2016 |
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